International Business Machines (IBM) has announced a significant milestone in semiconductor engineering: the successful demonstration of a chip architecture featuring components smaller than one nanometre. While the technology remains years away from commercial manufacturing, the breakthrough offers a glimpse into how the industry might continue shrinking electronics beyond the perceived physical limits of current methods.
The innovation centers on a design IBM describes using a “block of flats” analogy. For decades, chipmakers have relied on FinFET (Fin Field-Effect Transistor) architecture, where the current-carrying channel stands vertically like a fin on a substrate. This vertical orientation allowed more transistors to fit on a plane, but engineers are running out of space to make those fins narrower.
IBM’s new approach uses Gate-All-Around (GAA) nanosheet transistors. Instead of a single fin, the transistor channel consists of multiple horizontal nanosheets stacked vertically on top of one another. The gate material wraps completely around each sheet—top, bottom, and sides—providing superior electrostatic control. Crucially, the vertical stacking allows engineers to increase the drive current (performance) by simply adding more sheets to the stack, effectively building upward rather than trying to shrink the footprint further. IBM compares this to constructing a block of flats: you house more people (current) on the same plot of land (chip area) by building floors.
The specific achievement announced by IBM Research is the fabrication of a functional device with a gate length below one nanometre. In semiconductor nomenclature, process nodes like “3nm” or “2nm” are largely marketing labels that do not correspond to literal physical dimensions. However, the physical gate length—the distance between the source and drain electrodes—is a fundamental metric. Pushing this dimension below 1nm (roughly the width of five silicon atoms) has been considered a formidable quantum mechanical barrier, where electrons can tunnel uncontrollably through barriers, causing leakage and errors.
By demonstrating a working transistor at this scale using the stacked nanosheet design, IBM has shown that the GAA architecture retains sufficient electrostatic control to prevent leakage even at atomic-scale dimensions. The company notes this is the world’s first known demonstration of such a device.
Despite the headline-grabbing nature of the announcement, this technology will not appear in consumer devices anytime soon. IBM no longer manufactures its own chips at scale; instead, it licenses its intellectual property to foundries like Samsung and Intel. Translating a single research device into a high-yield manufacturing process involving billions of transistors on a single die requires solving immense challenges in materials science, lithography precision, thermal management, and defect density.
Industry roadmaps suggest that GAA nanosheet transistors (often called MBCFET by Samsung or RibbonFET by Intel) will enter high-volume manufacturing at the 3nm and 2nm nodes over the next few years. The sub-1nm gate length demonstrated by IBM likely targets nodes designated “1nm” or “1.4nm” (often referred to as the A14 or 1.4nm generation), which are not expected to reach production until the late 2020s or early 2030s.
For the average user, the immediate impact is zero. However, the long-term stakes are enormous. The steady shrinking of transistors—Moore’s Law—has driven the exponential growth in computing power that enables modern smartphones, cloud computing, and artificial intelligence. As traditional scaling hits atomic limits, performance gains would stall without architectural shifts like vertical stacking.
This breakthrough ensures a pathway for continued density improvements. More transistors per chip mean more powerful processors for data centers training large language models, more efficient modems for 6G connectivity, and longer battery life for mobile devices. It also reinforces the strategic importance of advanced semiconductor R&D in a geopolitical landscape where chip sovereignty is a national security priority. While the “block of flats” is still a blueprint, it confirms the foundation for the next decade of computing is being poured today.
Image: Photo: Muhammad Uthman Muhammed Suhaimi · Pexels
Based on reporting from bbc.co.uk.
Cookies & Privacy: This website uses cookies to ensure you get the best experience on our website. Read more.
